Michael Frank Deering: Hardware: FFB3/XVR-1000

Company: Sun Microsystems, Inc.

Date of Commercial Product Announcement: November 2001

Product Code Name/Production Name

The internal code name for this project by was “FFB3″. The commercial name FFB3 sold under was “XVR-1000″. The code name of the main rendering chip was “FBC3″ (for Frame Buffer Controller 3).

Engineering Teams

Mike Lavalle was the architect for XVR-1000; I was a consulting architect.

Engineering Details

XVR-1000 was the first product to use 3DRAMTM64, and to use MAJC. The MAJC chip performed vertex data input and pre-processing, and then programmable per-vertex transformation and lighting. The FBC3 chip (the render chip) took these pre-lit screen space triangles, performed set-up calculations, and rasterized them with per pixel texturing into the 3DRAM-64 frame buffer.

While XVR-1000 had all the industrial strength features that most of the professional workstation market needed (high quality antialiased lines, 8-bit overlay planes, 64-bit transformation stacking, a large texture cache of 256MB (esp for volume textures), by the time it came out, lower cost 3D gaming cards had similar triangle rendering performance and faster texture fill rates (even though few workstation applications could use texturing yet). So at this point many professional customers were trying to use the gaming cards for their professional applications, and the market for the XVR-1000 was considerably reduced. (The fact that Sun had retreated from a lot of the workstation space into servers at this point in time was a factor too.)


There were no direct publications about the XVR-1000 architecture, but it did share some technology with the XVR-4000.